M0226 VOXL 2 Classic Front End
Updated M0173 front-end board breaking out VOXL 2 camera groups J6 and J7, with barometer and PWM outputs.
M0226 is an updated M0173. It mates directly to camera groups J6 and J7 on VOXL 2 and breaks them out to four micro-coax image sensor connectors (two tracking, two hires), a 40-pin connector for a PMD ToF sensor, and a connector for a FLIR Lepton carrier board. New on M0226 are an onboard barometer, a 25 MHz Lepton clock that software can switch on and off, and an I2C PWM driver.
Table of contents
Overview
Hardware Requirements
Only compatible with VOXL 2. M0226 mates to both camera group connectors (J6 and J7) at once, so like M0173 it does not fit VOXL 2 Mini.
VOXL SDK Requirements
The camera connectors work the same way as on M0173. The Lepton clock control and the barometer need VOXL SDK 1.6.0 or newer:
- voxl-lepton-server v1.4.0+ auto-detects the M0226 GPIO expander and toggles the Lepton clock.
- voxl-fpv-px4 in SDK 1.6 adds the second apps-processor I2C bus for the M0226 barometer.
What’s New Compared to M0173
- Barometer: Infineon DPS368 on the board (I2C 0x77).
- Switchable Lepton clock: a 25 MHz oscillator for the Lepton, gated by a PI4IOE5V6408 GPIO expander, so software can turn the clock on and off.
- PWM outputs: PCA9685 16-channel I2C PWM driver (I2C 0x4E). The standard build brings two channels out to a 4-pin connector (J8).
- Hires sync: in the standard build, both hires sensors (J4, J5) share the GPIO 109 frame sync with the tracking sensors. See Image Sensor Synchronization.
- ToF connector J3: pins 10 and 12 carry the QUP1 I2C bus (GPIO 4/5). M0173 used them for SPI.
- Lepton connector J6: pinout unchanged, but the connector is now a JST SM08B-SHLS-TF (M0173 used SM08B-SRSS-TB).
Block Summary
| Function | Part | Bus | I2C Address (7-bit) |
|---|---|---|---|
| Barometer | Infineon DPS368 | QUP1 I2C (GPIO 4/5), 1.8 V | 0x77 |
| GPIO expander (Lepton clock enable) | Diodes PI4IOE5V6408 | QUP1 I2C (GPIO 4/5), 1.8 V | 0x44 (0x88 8-bit write) |
| PWM driver | NXP PCA9685 | QUP1 I2C (GPIO 4/5), buffered to 3.3 V by a TCA9517 | 0x4E |
| FLIR Lepton (off-board) | - | QUP1 I2C, level-shifted to 2.8 V by a TCA9517 | 0x2A |
| FLIR Lepton video | - | CAM0 SPI0 (GPIO 28/30/31), level-shifted to 2.8 V | - |
The barometer, GPIO expander, PWM driver, and Lepton I2C all share the QUP1 I2C bus (GPIO 4 SDA, GPIO 5 SCL), which also reaches the ToF connector J3 on pins 10 and 12.
Features
Image Sensor Synchronization
The sensor sync lines are routed through 0 Ω resistor options. The resistors fitted in the standard build connect the sensors as follows:
| Sensor | Connector | Sync Net | Standard Build |
|---|---|---|---|
| Front tracking (ID0) | J1 pin 21 | TRACKR_TRIGGER_ID0 | Driven by GPIO 109 (R1) |
| Downward tracking (ID6) | J2 pin 21 | TRACKR_TRIGGER_ID6 | Driven by GPIO 109 (R3) |
| Front hires (ID1) | J4 pin 21 | HIRES_SYNC_ID1 | Driven by GPIO 109 (R5) |
| Downward hires (ID2) | J5 pin 21 | HIRES_SYNC_ID2 | Driven by GPIO 109 (R7) |
| Front ToF (ID3) | J3 pin 40 | TOF_SYNC_ID3 | Not connected (R9/R10 not fitted) |
Each sync net can instead be moved to GPIO 111 (CCI_TIMER2) by fitting the alternate resistor (R2, R4, R6, R8, R10). GPIO 109 is the sync GPIO used by voxl-fsync-mod. See the M0173 VOXL 2 Driven Image Sensor Synchronization section for how voxl-camera-server enables it.
FLIR Lepton Clock
The Lepton’s 25 MHz clock (J6 pin 7) comes from an onboard oscillator buffered by a SN74AHC1G126. The buffer is enabled by output P0 (CLK_25M_EN, high = clock on) of the PI4IOE5V6408 GPIO expander. voxl-lepton-server drives it automatically. To toggle it by hand:
voxl-lepton-server --crystal_on
voxl-lepton-server --crystal_off
PWM Outputs
The PCA9685 runs from the 3.3 V rail (R30 fitted; R29 lets it run from 5 V instead), so the PWM outputs swing 0-3.3 V. In the standard build J8 carries channels LED2 and LED3. The 12-pin J7 footprint, which would bring out more channels, is not fitted.
Connectors
| Connector | Function | Part |
|---|---|---|
| P6 | VOXL 2 J6 (camera group 0) board-to-board | Hirose DF40HC(4.0)-60DS-0.4V(51) |
| P7 | VOXL 2 J7 (camera group 1) board-to-board | Hirose DF40HC(4.0)-60DS-0.4V(51) |
| J1 | Front tracking, ID0 (CSI0) | Hirose DF56C-26S-0.3V(51) |
| J2 | Downward tracking, ID6 (CSI0 combo) | Hirose DF56C-26S-0.3V(51) |
| J3 | Front ToF, ID3 (CSI3) | Molex 5052704012 |
| J4 | Front hires, ID1 (CSI1) | Hirose DF56C-26S-0.3V(51) |
| J5 | Downward hires, ID2 (CSI2) | Hirose DF56C-26S-0.3V(51) |
| J6 | FLIR Lepton carrier | JST SM08B-SHLS-TF |
| J7 | PWM, 12-pin (not fitted in standard build) | Molex 0532611271 |
| J8 | PWM, 4-pin | Molex 0532610471 |
J1 - Front Tracking : ID0 (CSI0)
Cable user code: V2(L1)-H26-TS
| Pin | Name |
|---|---|
| 1 | CCI_I2C0_SDA |
| 2, 4, 8 | PM8009_VREG_L2_DVDD_1P2 |
| 3 | CCI_I2C0_SCL |
| 5, 6 | DGND |
| 7 | CSI0_CLK_CON_P |
| 9 | CSI0_CLK_CON_N |
| 10 | PM8009_VREG_L7_DOVDD_1P8 |
| 11 | CSI0_LANE0_CON_P |
| 12 | GPIO_93_CAM0_RST_N |
| 13 | CSI0_LANE0_CON_N |
| 14 | CSI0_LANE1_CON_P |
| 15 | MCLK0_ID0 |
| 16 | CSI0_LANE1_CON_N |
| 17, 18 | DGND |
| 19 | PM8009_VREG_L5_AVDD_2P8 |
| 21 | TRACKR_TRIGGER_ID0 |
| 23 | DGND |
| 25 | VPH_PWR |
| 20, 22, 24, 26 | NC |
J2 - Downward Tracking : ID6 (CSI0/Combo)
Cable user code: V2(L2)-H26-TS. In combo-PHY mode CSI0 lane 2 is the data lane and CSI0 lane 3 is the clock.
| Pin | Name |
|---|---|
| 1 | CCI_I2C1_SDA |
| 2, 4, 8 | PM8009_VREG_L2_DVDD_1P2 |
| 3 | CCI_I2C1_SCL |
| 5, 6 | DGND |
| 7 | CSI0_LANE3_CON_P |
| 9 | CSI0_LANE3_CON_N |
| 10 | PM8009_VREG_L7_DOVDD_1P8 |
| 11 | CSI0_LANE2_CON_P |
| 12 | GPIO_110_CCI_TIMER1 |
| 13 | CSI0_LANE2_CON_N |
| 15 | MCLK0_ID6 |
| 17, 18 | DGND |
| 19 | PM8009_VREG_L5_AVDD_2P8 |
| 21 | TRACKR_TRIGGER_ID6 |
| 23 | DGND |
| 25 | VPH_PWR |
| 14, 16, 20, 22, 24, 26 | NC |
VPH_PWR on J1 and J2 is not used by the AR0144 tracking sensors.
J3 - Front ToF : ID3 (CSI3)
Cable user code: V2(U)-M40
| Pin | Name |
|---|---|
| 1 | PM8009_VREG_L6_AVDD_2P8 |
| 2 | VPH_PWR |
| 3 | PM8009_VREG_L7_DOVDD_1P8 |
| 4 | VREG_3P3V_LOCAL |
| 5 | PM8009_VREG_L1_DVDD_1P05 |
| 6 | GPIO_92_CAM1_RST_N |
| 7 | PM8009_VREG_L2_DVDD_1P2 |
| 8, 9 | DGND |
| 10 | GPIO_4_QUP1_SDA |
| 11 | CSI3_CLK_CON_P |
| 12 | GPIO_5_QUP1_SCL |
| 13 | CSI3_CLK_CON_N |
| 14 | GPIO_6_QUP1 (via 0 Ω, R11) |
| 15 | CSI3_LANE0_CON_P |
| 16 | GPIO_7_QUP1 |
| 17 | CSI3_LANE0_CON_N |
| 18 | DGND |
| 19 | CSI3_LANE1_CON_P |
| 20 | GPIO_114_CCI_ASYNC_IN |
| 21 | CSI3_LANE1_CON_N |
| 22 | GPIO_100_CAM_SHARED_RST_N (via 0 Ω, R14) |
| 23 | DGND |
| 24 | CCI_I2C3_SDA |
| 25 | CSI3_LANE2_CON_P |
| 26 | CCI_I2C3_SCL |
| 27 | CSI3_LANE2_CON_N |
| 28 | CCI_I2C2_SDA |
| 29 | CSI3_LANE3_CON_P |
| 30 | CCI_I2C2_SCL |
| 31 | CSI3_LANE3_CON_N |
| 32, 33 | DGND |
| 34 | GPIO_97_MCLK3 |
| 35 | GPIO_111_CCI_TIMER2 (via 0 Ω, R12) |
| 36 | GPIO_96_MCLK2 |
| 37 | VREG_3P3V_LOCAL |
| 38 | VREG_S4A_1P8 |
| 39 | VPH_PWR |
| 40 | TOF_SYNC_ID3 |
| 41, 42 | DGND |
| 43, 44 | VDC_5V_LOCAL |
J4 - Front Hires : ID1 (CSI1)
Cable user code: V2(U)-H26-HR
| Pin | Name |
|---|---|
| 1 | CCI_I2C1_SDA |
| 2, 4, 8 | PM8009_VREG_L2_DVDD_1P2 |
| 3 | CCI_I2C1_SCL |
| 5, 6 | DGND |
| 7 | CSI1_CLK_CON_P |
| 9 | CSI1_CLK_CON_N |
| 10 | PM8009_VREG_L7_DOVDD_1P8 |
| 11 | CSI1_LANE0_CON_P |
| 12 | GPIO_113_CCI_TIMER4 |
| 13 | CSI1_LANE0_CON_N |
| 14 | CSI1_LANE1_CON_P |
| 15 | GPIO_95_MCLK1 |
| 16 | CSI1_LANE1_CON_N |
| 17, 18 | DGND |
| 19 | PM8009_VREG_L5_AVDD_2P8 |
| 20 | CSI1_LANE2_CON_P |
| 21 | HIRES_SYNC_ID1 |
| 22 | CSI1_LANE2_CON_N |
| 23 | DGND |
| 24 | CSI1_LANE3_CON_P |
| 25 | VPH_PWR |
| 26 | CSI1_LANE3_CON_N |
J5 - Downward Hires : ID2 (CSI2)
Cable user code: V2(L)-H26-HR
| Pin | Name |
|---|---|
| 1 | CCI_I2C2_SDA |
| 2, 4, 8 | PM8009_VREG_L2_DVDD_1P2 |
| 3 | CCI_I2C2_SCL |
| 5, 6 | DGND |
| 7 | CSI2_CLK_CON_P |
| 9 | CSI2_CLK_CON_N |
| 10 | PM8009_VREG_L7_DOVDD_1P8 |
| 11 | CSI2_LANE0_CON_P |
| 12 | GPIO_92_CAM1_RST_N |
| 13 | CSI2_LANE0_CON_N |
| 14 | CSI2_LANE1_CON_P |
| 15 | GPIO_96_MCLK2 |
| 16 | CSI2_LANE1_CON_N |
| 17, 18 | DGND |
| 19 | PM8009_VREG_L6_AVDD_2P8 |
| 20 | CSI2_LANE2_CON_P |
| 21 | HIRES_SYNC_ID2 |
| 22 | CSI2_LANE2_CON_N |
| 23 | DGND |
| 24 | CSI2_LANE3_CON_P |
| 25 | VPH_PWR |
| 26 | CSI2_LANE3_CON_N |
J6 - FLIR Lepton (SM08B-SHLS-TF)
All signals are 2.8 V, level-shifted on the board from the 1.8 V VOXL 2 domain.
| Pin | Name |
|---|---|
| 1 | PM8009_VREG_L5_AVDD_2P8 |
| 2 | FLIR_SPI_SCK_2P8 |
| 3 | FLIR_SPI_CS_N_2P8 |
| 4 | FLIR_SPI_MISO_2P8 |
| 5 | FLIR_I2C_SCL_2P8V |
| 6 | FLIR_I2C_SDA_2P8V |
| 7 | CLK_25M_FLIR_2P8V |
| 8 | DGND |
J8 - PWM (0532610471)
3.3 V PWM outputs from the PCA9685.
| Pin | Name |
|---|---|
| 1 | I2C_PWM2 (PCA9685 LED2) |
| 2 | DGND |
| 3 | I2C_PWM3 (PCA9685 LED3) |
| 4 | DGND |