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Qualcomm Flight RB5 Flight Carrier Board Connectors

Overview

All single ended signals on B2B connectors J3, J5, J6, J7, and J8 are 1.8V CMOS unless explicitly noted. All single ended signals on cable-to-board connectors J10, J11, J12,J18, & J19 are 3.3V CMOS unless explicitly noted.

ConnectorDescriptionMPN (Board Side)Mating MPN (Board/Cable Side)TypeSignal Feature Summary
J1SOM InterfaceSEAF8-50-05.0-L-10-2-KSOMHigh Density 500-pin B2BAll power and signal interfaces to the RB5 SOM
J2FanSM02B-SRSS-TB(LF)(SN)SHR-02V-SCable Header, 2-pin R/A5V DC for FAN + PWM Controlled FAN-Return (GND)
J3Legacy B2BQSH-030-01-L-D-K-TRQTH-030-01-L-D-A-K-TRB2B Receptacle, 60-pin5V/3.8V/3.3V/1.8V power for plug-in boards, JTAG and Debug Signals, QUP expansion, GPIOs, USB3.1 Gen 2 (USB1)
J4Prime Power In220570450050375043Cable Connector, 4-pin R/A+5V main DC power in + GND, I2C@5V for power monitors
J5High Speed B2BADF6-30-03.5-L-4-2-A-TRADM6-30-01.5-L-4-2-A-TRB2B Socket, 120-pinMore 3.8V/3.3V/1.8V power for plug-in boards, 5V power in for “SOM Mode”, QUP expansion, GPIOS (including I2S), SDCC (SD Card V3.0), UFS1 (secondary UFS Flash), 2L PCIe Gen 3, AMUX and SPMI PMIC signals
J6Camera Group 0DF40C-60DP-0.4V(51)DF40C-60DS-0.4VB2B Plug, 60-pinQty-2 4L MIPI CSI ports, CCI and camera control signals, 8 power rails (from 1.05V up to 5V) for cameras and other sensors, dedicated SPI (QUP) port
J7Camera Group 1DF40C-60DP-0.4V(51)DF40C-60DS-0.4VB2B Plug, 60-pinQty-2 4L MIPI CSI ports, CCI and camera control signals, 8 power rails (from 1.05V up to 5V) for cameras and other sensors, dedicated SPI (QUP) port
J8Camera Group 2DF40C-60DP-0.4V(51)DF40C-60DS-0.4VB2B Plug, 60-pinQty-2 4L MIPI CSI ports, CCI and camera control signals, 8 power rails (from 1.05V up to 5V) for cameras and other sensors, dedicated SPI (QUP) port
J9USB-CUJ31-CH-3-SMT-TRUSB Type-CCable Receptacle, 24-pin R/AUSB-C with re-driver and display port alternate mode (USB0)
J10SPI ExpansionSM08B-GHS-TB(LF)(SN)GHR-08V-SCable Header, 8-pin R/ASPI@3.3V with 2 CS_N pins, 32kHz CLK_OUT@3.3V
J11Reserved for FutureSM04B-GHS-TB(LF)(SN)GHR-04V-SCable Header, 4-pin R/ASpare I2C not pinned on SOM, reserved for future use. Do not use.
J12R/C UARTBM04B-GHL-TBT(LF)(SN)(N)GHR-04V-SYellow Cable Header, 4-pin VerticalR/C UART@3.3V, 3.3V_RC switchable voltage
J18ESCSM04B-GHS-TB(LF)(SN)GHR-04V-SCable Header, 4-pin R/AESC UART@3.3V, 3.3V reference voltage
J19GNSS/MAGSM06B-GHS-TB(LF)(SN)GHR-06V-SCable Header, 6-pin R/AGNSS UART@3.3V, Magnetometer I2C@3.3V, 5V

Connectors

J2 Fan

J2 Fan Pin-out

Pin#SignalNotes/Usage
1VDC_5V_LOCAL5V protected power output *
2FAN RETURN (GND)Return limited to ~400mA

J3 Legacy Board to Board Connector

The Legacy Board to Board connector is designed to host VOXL Add-ons such as the LTE Add-on v2 and the Microhard Add-on.

ConnectorMPN
Board ConnectorQSH-030-01-L-D-K-TR
Mating ConnectorQTH-030-01-L-D-A-K-TR

J3 Pin-out

Odd Pin #Signal/VoltageEven Pin #Signal/Voltage
1DGND2VDC_5V_LOCAL
3GPIO_23_UART7_RXD4VDC_5V_LOCAL
5GPIO_22_UART7_TXD6VDC_5V_LOCAL
7GPIO_52_SPI17_MISO8USB1_HS_ID_LEGACY (Normally N.C.)
9GPIO_53_SPI17_MOSI10DGND
11DGND12USB1_HS_DM
13GPIO_126_I2C9_SCL14USB1_HS_DP
15GPIO_125_I2C9_SDA16VDC_5V_LOCAL_USB1
17GPIO_55_SPI17_CS18DGND
19GPIO_54_SPI17_SCLK20USB1_SS_TX_M
21DGND22USB1_SS_TX_P
23GPIO_130_I2C10_SCL24GPIO_20
25GPIO_129_I2C10_SDA26GPIO_21
27GPIO_35_DBG_UART12_RX28GPIO_32_QUP12_L0
29GPIO_34_DBG_UART12_TX30GPIO_33_QUP12_L1
31DGND32USB1_SS_RX_M
33JTAG_SRST_N34USB1_SS_RX_P
35JTAG_TCK36DGND
37JTAG_TDI38GPIO_131_USB_HUB_RESET
39JTAG_TDO40GPIO_124
41JTAG_TMS42GPIO_145
43JTAG_TRST_N44DGND
45JTAG_PS_HOLD46GPIO_90_FAST_BOOT_3
47VREG_S4A_1P848GPIO_76_FAST_BOOT_2
49PM_RESIN_N50GPIO_47_SPI14_CS2_FAST_BOOT_1
51SDM_RESOUT_N52GPIO_27_FAST_BOOT_0
53VREG_3P3V_LOCAL54GPIO_128_WDOG_DIS
55KPD_PWR_N56SDM_FORCE_USB_BOOT
57VPH_PWR58DGND
59DGND60CLK_PMK_PMIC

J4 Prime Power-in

J4 Prime Power-in Pin-out

Pin#SignalNotes/Usage
1VDCIN_5VDC from Power Module, “unprotected”
2GNDPower Module Return
3I2C_CLKSSC_QUP_1, 5V signal levels, Pullups on Power Module
4I2C_SDASSC_QUP_1, 5V signal levels, Pullups on Power Module

J5 High-speed Board to Board Connector

ConnectorMPN
Board ConnectorADF6-30-03.5-L-4-2-A-TR
Mating ConnectorADM6-30-01.5-L-4-2-A-TR

J5 Pin-out

PinSignal/VoltagePinSignal/VoltagePinSignal/VoltagePinSignal/Voltage
A1VDCIN_5VB1VDCIN_5VC1VDCIN_5VD1VDCIN_5V
A2VDCIN_5VB2VDCIN_5VC2VDCIN_5VD2VDCIN_5V
A3GNDB3GNDC3GNDD3GND
A4GNDB4GNDC4GNDD4GND
A5VREG_3P3V_LOCALB5GNDC5GPIO_119_SPI3_MISOD5GPIO_36_UART13_CTS
A6VREG_3P3V_LOCALB6GNDC6GPIO_120_SPI3_MOSID6GPIO_37_UART13_RTS
A7GNDB7GPIO_16_QUP6_L0C7GPIO_121_SPI3_SCLKD7GPIO_38_UART13_TXD
A8GPIO_115_I2C2_SDAB8GPIO_17_QUP6_L1C8GPIO_122_SPI3_CSD8GPIO_39_UART13_RXD
A9GPIO_116_I2C2_SCLB9GPIO_18_QUP6_L2C9GPIO_24_I2C8_SDAD9GPIO_8_I2C4_SDA
A10GPIO_117_QUP2_L2B10GPIO_19_QUP6_L3C10GPIO_25_I2C8_SCLD10GPIO_9_I2C4_SCL
A11GPIO_118_QUP2_L3B11GPIO_155C11GNDD11PM8250_AMUX1
A12SD_UFS_CARD_DET_NB12GPIO_154C12GPIO_145 (intentional duplicate to Legacy B2B pin 42)D12GND
A13GNDB13GPIO_153C13GPIO_144D13PCIE2_REFCLK_M
A14SDC2_CLKB14GPIO_152C14GPIO_143D14PCIE2_REFCLK_P
A15GNDB15GNDC15GPIO_142D15GND
A16VREG_L9C_2P96B16GPIO_0_QUP19_L0C16GPIO_137D16PCIE2_RX0_M
A17SDC2_CMDB17GPIO_1_QUP19_L1C17GNDD17PCIE2_RX0_P
A18SDC2_DATA_0B18GPIO_2_QUP19_L2C18GPIO_88D18GND
A19SDC2_DATA_1B19GPIO_3_QUP19_L3C19GPIO_89D19PCIE2_RX1_M
A20SDC2_DATA_2B20GPIO_56_I2C18_SDAC20GPIO_87_PCIE2_WAKE_ND20PCIE2_RX1_P
A21SDC2_DATA_3B21GPIO_57_I2C18_SCLC21GPIO_86D21GND
A22GNDB22GNDC22GPIO_85D22PCIE2_TX0_M
A23UFS1_REFCLKB23GPIO_60_QUP11_L0C23GNDD23PCIE2_TX0_P
A24GNDB24GPIO_61_QUP11_L1C24PMIC_8150L_AMUX1D24GND
A25UFS1_TX0_MB25GPIO_62_QUP11_L2C25GNDD25PCIE2_TX1_M
A26UFS1_TX0_PB26GPIO_63_QUP11_L3C26GNDD26PCIE2_TX1_P
A27GNDB27GNDC27GNDD27GND
A28UFS1_RX0_MB28SPMI_CLKC28VPH_PWR_3P8VD28GND
A29UFS1_RX0_PB29SPMI_DATAC29VPH_PWR_3P8VD29VREG_S4A_1P8
A30GNDB30GNDC30VPH_PWR_3P8VD30VREG_S4A_1P8

J6, J7, and J8 Camera Group [0:2] High-speed Board to Board Connector

ConnectorMPN
Board ConnectorDF40C-60DP-0.4V(51)
Mating ConnectorDF40C-60DS-0.4V

J6, J7, and J8 Pin-out (generic group pinout, please work with ModalAI for any mating designs to gauranteee proper operation)

Pin#Signal
1GND
2GND
3Lower CCI_I2C_SDA
4DVDD 1.2V
5Lower CCI_I2C_SCL
6DOVDD 1.8V
7GND
8DVDD 1.05V
9Lower CSI_CLK_P
10Lower RST_N
11Lower CSI_CLK_M
12Lower MCLK
13Lower CSI_DAT0_P
14GND
15Lower CSI_DAT0_M
16Lower CCI Timer
17GND
18Upper CCI Timer
19Lower CSI_DATA1_P
20Upper MCLK
21Lower CSI_DATA1_M
22AVDD 2.8V
23Lower CSI_DATA2_P
24GND
25Lower CSI_DATA2_M
26Upper RST_N, Shared
27GND
28Upper CCI_I2C_SDA
29Lower CSI_DATA3_P
30Upper CCI_I2C_SCL
31Lower CSI_DATA3_M
32Spare MCLK/GPIO
33GND
34Group SPI MISO
35Upper CSI_CLK_P
36Group SPI MOSI
37Upper CSI_CLK_M
38Group SPI SCLK
39Upper CSI_DATA0_P
40Group SPI CS_N
41Upper CSI_DATA0_M
42VREG_S4A_1P8
43GND
44GND
45Upper CSI_DATA1_P
46VPH_PWR 3.8V
47Upper CSI_DATA1_M
48VPH_PWR 3.8V
49Upper CSI_DATA2_P
50GND
51Upper CSI_DATA2_M
523.3V
53GND
54GND
55Upper CSI_DATA3_P
565V
57Upper CSI_DATA3_M
585V
59GND
60GND

J10 SPI Expansion

J10 SPI Expansion Pin-out

Pin#SignalNotes/Usage
1VREG_3P3V_LOCAL3.3V Power Output *
2MISO (Input)APPS_QUP_14, 3.3V signal levels
3MOSI (Output)APPS_QUP_14, 3.3V signal levels
4SCLK (Output)APPS_QUP_14, 3.3V signal levels
5CS0_N (Output)APPS_QUP_14, 3.3V signal levels
6CS1_N/GPIO_46 (Output)Second SPI CS_N or GPIO
732K_CLK_OUT (Output)32kHz PMIC Sleep CLK, 3.3V signal levels
8GNDGND

J12 R/C UART (Spektrum/DSMX)

J12 R/C UART (Spektrum/DSMX) Pin-out

Pin#SignalNotes/Usage
1VREG_3P3V_RCL3.3V Switchable Power Output *
2RC_UART_TX (Output)APPS_QUP_13, 3.3V signal levels
3RC_UART_RX (Input)APPS_QUP_13, 3.3V signal levels
4GNDGND

J18 ESC UART

J18 ESC UART

Pin#SignalNotes/Usage
1VREG_3P3V_LOCAL3.3V Power Output *
2ESC_UART_TX (Output)SSC_QUP_2, 3.3V signal levels.
3ESC_UART_RX (Input)SSC_QUP_2, 3.3V signal levels.
4GNDGND

J19 GNSS/MAG

J19 GNSS/MAG

Pin#SignalNotes/Usage
1VDC_5V_LOCAL5V protected Power Output *
2GNSS UART TX (output)APPS_QUP_18, 3.3V signal levels
3GNSS UART RX (input)APPS_QUP_18, 3.3V signal levels
4MAG I2C SCLSSC_QUP_0, 3.3V signal levels, 2.2K Pullup to VREG_3P3V_LOCAL
5MAG I2C SDASSC_QUP_0, 3.3V signal levels, 2.2K Pullup to VREG_3P3V_LOCAL
6GNDGND

Power Input/Output Important Note:

  • All power outputs on cable connectors are rated for 1A, however, the system cannot provide 1A simultaneously on all connectors. Contact ModalAI for design assistance.

  • The difference between VDCIN_5V and VDC_5V_LOCAL is very important. The power module provides VDCIN_5V (raw voltage input) to the platform. On-board is an eFuse that protects the system from accidental wrong-voltage application, droops/brown-outs, or down-stream shorts or overloads. The output of the eFuse is VDC_5V_LOCAL (i.e.: protected output).



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