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M0173 VOXL 2 Starling 2 Front End

M0173 Serves as a breakout for Camera Groups J6 and J7 on VOXL 2. It exposes 4 COAX camera connectors for use with M0166 Tracking Cameras or M0161 IMX412 Hires cameras. It also exposes a connector for use with a single PMD TOF sensor, and a connector for attaching an M0157 Lepton plus rangefinder board.

VOXL 2 Coax Camera Bundle


Table of contents

  1. Overview
    1. VOXL SDK Requirements
    2. Hardware Requirements
  2. New Kernel Configuration for M0173
  3. Features
    1. VOXL2 Driven Image Sensor Synchronization
    2. Downward Range Finder and FLIR Lepton
  4. Connectors
    1. J1 - Front Tracking : ID0 (CSI0)
    2. J2 - Downward Tracking : ID6 (CSI0/Combo)
    3. J3 - Front T0F: ID3 (CSI3)
    4. J4 - Front Hires : ID1 (CSI1)
    5. J5 - Downward Hires : ID2 (CSI2)
    6. J6 - SM08B-SRSS-TB

Overview

VOXL SDK Requirements

VOXL SDK 1.3.0+ is required.

Hardware Requirements

Only compatible with VOXL 2

New Kernel Configuration for M0173

The D0014/D0012 drone family uses the new kernel config 1 (as opposed to config 0). See /sys/module/voxl_platform_mod/parameters/config to verify proper kernel config.

Features

VOXL2 Driven Image Sensor Synchronization

In the D0014/D0012 architecture using the M0173 breakout, the following occurs for the tracking sensors:

  • The voxl-fysnc-mod ships in SDK 1.3+ and defaults to use GPIO 109, 30Hz, and disabled.
  • When a C26/C27/C8 image sensor configurations is setup using voxl-configure-cameras, the config file at /etc/modalai/voxl-camera-server.conf is setup with:
...
"fsync_en":	true,
"fsync_gpio":	109,
...
  • When camera server runs, it will use the voxl-fsync-mod params exposed to the file system at /sys/module/voxl_fsync_mod/parameters, for example enabled, gpio_num, and enable the sync pulse at the default 30Hz.
  • When a C26/C27/C8 image sensor configurations is setup using voxl-configure-cameras, the AR0144 drivers are copied into /usr/lib/camera that are setup for slave mode and will capture sychronized frames at the rate defined (note: the FPS should also be configured in /etc/modalai/voxl-camera-server.conf accordinly to ensure proper register settings are loaded)

D0014-M0173.jpg

Downward Range Finder and FLIR Lepton

In the D0014/D0012 architecture using the M0173 breakout:

  • VL53L1CX Range Finder is accesible over /dev/i2c-4, see /etc/modalai/voxl-rangefinder-server.conf and voxl-rangefinder
  • Not supported in SDK 1.3.0 but coming soon, FLIR Lepton is accesible over /dev/i2c-4 and /dev/spidev0.0, see /etc/modalai/voxl-lepton-server.conf and voxl-lepton-server

D0014-M0157.jpg

Connectors

J1 - Front Tracking : ID0 (CSI0)

PinName
1CCI_I2C0_SDA
3CCI_I2C0_SCL
5DGND
6DGND
7CSIO_CLK_CON_P
9CSIO_CLK_CON_N
10PM8009_VREG_L7_DOVDD_1P8
11CSIO_LANE0_CON_P
12GPIO_93_CAMO_RST_N
13CSI0_LANE0_CON_N
14CSIO_LANE1_CON_P
15MCLK0_ID0
16CSI0_LANE1_CON_N
17DGND
18DGND
19PM8009_VREG_L5_AVDD_2P8
21TRACKR_TRIGGER_ID0
23DGND
25VPH_PWR
2,4,8PM8009_VREG_L2_DVDD_1P2

J2 - Downward Tracking : ID6 (CSI0/Combo)

PinName
1CCI_I2C1_SDA
3CCI_I2C1_SCL
5DGND
6DGND
7CSIO_LANE3_CON_P
9CSIO_LANE3_CON_N
10PM8009_VREG_L7_DOVDD_1P8
11CSIO_LANE2_CON_P
12GPIO_110_CCI_TIMER1
13CSIO_LANE2_CON_N
15MCLK0_ID6
17DGND
18DGND
19PM8009_VREG_L5_AVDD_2P8
21TRACKR_TRIGGER_ID6
23DGND
25VPH_PWR
2,4,8PM8009_VREG_L2_DVDD_1P2

J3 - Front T0F: ID3 (CSI3)

PinName
1PM8009_VREG_L6_AVDD_2P8
2VPH_PWR
3PM8009_VREG_L7_DOVDD_1P8
4VREG_3P3V_LOCAL
5PM8009_VREG_L1_DVDD_1P05
6GPIO_92_CAMI_RST_N
7PM8009_VREG_L2_DVDD_1P2
8DGND
9DGND
10GPIO_4_CAM1_SPI1_MISO
11CSI3_CLK_CON_P
12GPIO_5_CAM1_SPI1_MOSI
13CSI3_CLK_CON_N
14GPIO_6_CAM1_SPI1_CLK
15CSI3_LANE0_CON_P
16GPIO_7_CAMI_SPI1_CS
17CSI3_LANE0_CON_N
18DGND
19CSI3_LANE1_CON_P
20GPIO_114_CCI_ASYNC_IN
21CSI3_LANE1_CON_N
22GPIO_100_CAM_SHARED_RST_N
23DGND
24CCI_I2C3_SDA
25CSI3_LANE2_CON_P
26CCI_I2C3_SCL
27CSI3_LANE2_CON_N
28CCI_I2C2_SDA
29CSI3_LANE3_CON_P
30CCI_I2C2_SCL
31CSI3_LANE3_CON_N
32DGND
33DGND
34GPIO_97_MCLK3
35GPIO_111_CCI_TIMER2
36GPIO_96_MCLK2
37VREG_3P3V_LOCAL
38VREG_S4A_1P8
39VPH_PWR
40TOF_SYNC_ID3
43VDC_5V_LOCAL
44VDC_5V_LOCAL

J4 - Front Hires : ID1 (CSI1)

PinName
1CCI_I2C1_SDA
3CCI_I2C1_SCL
5DGND
6DGND
7CSI1_CLK_CON_P
9CSI1_CLK_CON_N
10PM8009_VREG_L7_DOVDD_1P8
11CSI1_LANE0_CON_P
12GPI0_113_CCI_TIMER4
13CSI1_LANE0_CON_N
14CSI1_LANE1_CON_P
15GPIO95_MCLK1
16CSI1_LANE1_CON_N
17DGND
18DGND
19PM8009_VREG_L5_AVDD_2P8
20CSI1_LANE2_CON_P
21HIRES_SYNC_ID1
22CSI1_LANE2_CON_N
23DGND
24CSI1_LANE3_CON_P
25VPH_POWER
26CSI1_LANE3_CON_N
2,4,8PM8009_VREG_L2_DVDD_1P2

J5 - Downward Hires : ID2 (CSI2)

PinName
1CCI_I2C2_SDA
3CCI_I2C2_SCL
5DGND
6DGND
7CSI2_CLK_CON_P
9CSI2_CLK_CON_N
10PM8009_VREG_L7_DOVDD_1P8
11CSI2_LANE0_CON_P
12GPI092_CAMI_RST_N
13CSI2_LANE0_CON_N
14CSI2_LANE1_CON_P
15GPIO96_MCLK2
16CSI2_LANE_1_CON_N
17DGND
18DGND
19PM8009_VREG_L6_AVDD_2P8
20CSI2_LANE2_CON_P
21HIRES_SYNC_ID2
22CSI2_LANE2_CON_N
23DGND
24CSI2_LANE3_CON_P
25VPH_POWER
26CSI1_LANE3_CON_N
2,4,8PM8009_VREG_L2_DVDD_1P2

J6 - SM08B-SRSS-TB

PinName
1VREG_AVDD_2P8_FLIR
2FLIR_SPI_SCK_2P8
3FLIR_SPI_CS_N_2P8
4FLIR_SPI_MISO_2P8
5FLIR_I2C_SCL_2P8V
6FLIR_I2C_SDA_2P8V
7CLK_25M_FLIR_2P8V
8GND